Here is a map that can run Star Ocean 96mbit:
Code:
<?xml version="1.0" encoding="UTF-8"?>
<cartridge region="NTSC">
<rom name="program.rom" size="0xc00000"/>
<map id="rom" mode="linear" address="00-3f:8000-ffff" offset="0x000000"/>
<map id="rom" mode="linear" address="40-6f:0000-7fff" offset="0x800000"/>
<map id="rom" mode="linear" address="40-7f:8000-ffff" offset="0x200000"/>
<map id="rom" mode="linear" address="80-bf:8000-ffff" offset="0x400000"/>
<map id="rom" mode="linear" address="c0-ff:0000-7fff" offset="0xa00000"/>
<map id="rom" mode="linear" address="c0-ff:8000-ffff" offset="0x600000"/>
<map id="rom" mode="linear" address="c0:0000-7fff" offset="0x000000"/>
<ram name="save.ram" size="0x2000"/>
<map id="ram" mode="linear" address="20-3f:6000-7fff"/>
<map id="ram" mode="linear" address="a0-bf:6000-7fff"/>
</cartridge>
"linear" in this case just means that A15 is not connected as one of the address pins to the ROM chip, it's ignored.
The weirdest part is is the last ROM map line. It's required for the game to play, but it doesn't make a lot of sense to me to design a cart like that. Perhaps it's a GD3 quirk.
As for the original topic, the max sensible ROM size is 95mbit:
00-3f:8000-bfff
40-7d:0000-ffff
80-bf:8000-ffff
c0-ff:0000-ffff
With weirder granularity, you could push it to 110.125mbit:
00-3f:4380-ffff (0xbc80 bytes granularity)
40-7d:0000-ffff
80-bf:4380-4fff
c0-ff:0000-ffff
0x5e4000 + 0x400000 + 0x3e0000 = 0xdc4000
With absolutely psychotic granularity, you could grab a few more unused areas:
2000-20ff
2184-21ff (would even be fetched from a different bus)
2200-3fff
4000-4015 (slowest speed)
4018-41ff (slowest speed)
420e-42ff
4380-ffff
= 0xdeec bytes/block.
0x6f7600 + 0x400000 + 0x3e0000 = 0xed7600 = 118.73mbit
Anything further will require a memory map controller. Which is really the sensible option after 95mbit. I'd even do it after 64mbit.
I find it wasteful and stupid that the S-DD1 and SPC7110 had MMCs for 48mbit and 40mbit games.