Legible SNES Schematics
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Re: Legible SNES Schematics
If most of your traces are along the lines of the snap grid, then you need to divide the width of your schematic by the length of a snap grid unit, multiply that by an integer at least 2, and use that as your width in pixels.
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Re: Legible SNES Schematics
The /RESET line on the cart socket is basically just a passive bus running to many of the chips in the console (except the CPU, which has its /RESET line controlled by the CIC) that's pulled up to VCC through a resistor. Simple POR signal, which can be driven low by the cart as you said (but be sure to use open drain output). If you're designing a cart, any chips with both active-high and active-low chip selects should have the active-high one (often named CE2 without a bar to indicate active-high, or else /RST with a bar, same thing) connected to this pin.nocash wrote:And /RESET on the Cartridge slot, normally it's output to the cartridge... but, as far as I know, the official japanese "Nintendo Power" flashcarts do actually use it the other way around (to reset the console after game-selection from the flashcart menu).
Re: Legible SNES Schematics
Just some minor stuff...
I think there's a typo in pinout_s-wram.pdf 's heading. Shouldn't it be "SNES S-WRAM Pinout[...]" instead of "SNES S-SRAM Pinout[...]" ?
And by the way, what is "G" (pin 55)? why isn't it called NC like the other NC pins (pin 18-22)?
I think there's a typo in pinout_s-wram.pdf 's heading. Shouldn't it be "SNES S-WRAM Pinout[...]" instead of "SNES S-SRAM Pinout[...]" ?
And by the way, what is "G" (pin 55)? why isn't it called NC like the other NC pins (pin 18-22)?
Re: Legible SNES Schematics
"G" comes from the original leaked SNES schematic, (vis viewtopic.php?p=111386#p111386 ).
Usually "G" is some kind of enable, so I have no idea why it seems to be left disconnected.
Usually "G" is some kind of enable, so I have no idea why it seems to be left disconnected.
Re: Legible SNES Schematics
Thanks! I'll fix it.hyarion wrote:I think there's a typo in pinout_s-wram.pdf 's heading. Shouldn't it be "SNES S-WRAM Pinout[...]" instead of "SNES S-SRAM Pinout[...]"?
'G' typically is an enable pin (as lidnariq said) on other memory chips that I'm familiar with. Most likely there is an internal pull-up on that pin which prevents the user from having to drive this pin (which saves space on the board) unless the user actually wants to be able to *disable* the memory. If a pin has the *name* 'NC' it means that physical pin on the IC literally has no connection to the die within the package (i.e. there is no bond-wire). On the other hand, if you see "NC" in the description field of the pinout document it means that there is simply nothing connected to that pin on the PCB even though that pin does indeed connect to something on the die.hyarion wrote:And by the way, what is "G" (pin 55)? why isn't it called NC like the other NC pins (pin 18-22)?
Re: Legible SNES Schematics
If "G" would be an unused input, then they'd have probably wired it to GND or VCC - that doesn't take up much space on the board.
And the pins seems to output something: During /RESET it's always low, and when releasing reset it's having some HIGH spikes, probably on memory accesses.
There seems to be also something connected to it: at least a short wire, and a via. But maybe that's just an dead-end / test-point (I didn't dig deeper, and didn't check if the via goes anywhere).
And the pins seems to output something: During /RESET it's always low, and when releasing reset it's having some HIGH spikes, probably on memory accesses.
There seems to be also something connected to it: at least a short wire, and a via. But maybe that's just an dead-end / test-point (I didn't dig deeper, and didn't check if the via goes anywhere).
Re: Legible SNES Schematics
There were some features removed from the Super Famicom before sale. At first, N had planned to ship the DSP-1 in every console instead of in every Pilotwings/Mario Kart Game Pak. The CPU would have had to generate an enable signal for that, just as it generates enables for the gamepads and the PPU ports. Perhaps one of the cut signals is an enable for a cut feature.
Re: Legible SNES Schematics
Interesting, do you remember where you read it?tepples wrote:At first, N had planned to ship the DSP-1 in every console instead of in every Pilotwings/Mario Kart Game Pak.
Re: Legible SNES Schematics
I can remember Dylan Cuthbert saying something to the effect of that in one of his interviews. They (Argonaut) came up with the Super FX concept even before the system was launched. The DSP-1 was another one of those projects. NEITHER got included in the final console.hyarion wrote:Interesting, do you remember where you read it?tepples wrote:At first, N had planned to ship the DSP-1 in every console instead of in every Pilotwings/Mario Kart Game Pak.
Nor the backwards compatibility to the NES. (Different article). The SNES was quite a compromise.
Edit: rereading, I've been kind of misleading. The Super Famicom hardware was developed, for which tech demos were developed, and one of them involved a red biplane and an airport (with a simple angled rotating view from above), from which diverged DragonFly and Flight Club, which eventually merged back into Pilotwings. The Argonaut team was shown some form of Pilotwings after they demonstrated the 3D that they could do in software (like with X on the GameBoy). They said to get any better would involve having to make another chip.
What was misleading is that the DSP-1 could have been in the SNES, but there was no way the Mario Chip (which became Super FX) would have been done in time for launch of the system.
partial source: http://gamevideos.1up.com/video/id/16331
Re: Legible SNES Schematics
about the schematic;
- pin 5 at U17 (Stereo DAC)has a short trace that isn't connected to anything, why does it exist if it isn't connected to anything?
- pin 39 on U14 (S-DSP) has a dot right where it is connected to the trace even though that's the only trace connected to it
- the url https://rm-rfroot.net/snes_fpga/ at the bottom left corner notes doesn't work (snes_fpga sounds interesting though )
Last edited by hyarion on Wed Oct 02, 2013 6:40 am, edited 1 time in total.
Re: Legible SNES Schematics
What is U17? And pin 39 of which component? And what bottom corner notes?
And do you mean dots/traces in the schematic, or on the actual mainboard?
Okay, I've found U17... it's the 16bit stereo DAC. Pin5 and Pin12 are AGND (Analog GND).
That might work if only one AGND is connected, thought I'd expect that the mainboard has both pins connected. If there's a dead-end AGND trace on mainboard or in schematic then it might be meant to be some shielding. And dots/pads/vias without connection might be test points... or even relicts from earlier versions where nintendo planned to connect something to that pins.
And do you mean dots/traces in the schematic, or on the actual mainboard?
Okay, I've found U17... it's the 16bit stereo DAC. Pin5 and Pin12 are AGND (Analog GND).
That might work if only one AGND is connected, thought I'd expect that the mainboard has both pins connected. If there's a dead-end AGND trace on mainboard or in schematic then it might be meant to be some shielding. And dots/pads/vias without connection might be test points... or even relicts from earlier versions where nintendo planned to connect something to that pins.
Re: Legible SNES Schematics
Sorry, I forgot to add the IC name and I though people people would use the search function in PDF files. I've updated my message above.
I meant in the schematic.
The dead end wire looks like an error, if its not, then it might be good to add a label next to it describing it.
I meant in the schematic.
The dead end wire looks like an error, if its not, then it might be good to add a label next to it describing it.
Re: Legible SNES Schematics
The dot on S-DSP.pin39 (/MUTE) seems to be your own jwdonal's invention - the scanned http://nocash.emubase.de/sns-scan.gif schematic doesn't have it :-)
For the stereo DAC's dead-end AGND wire, there's no visible connection on the mainboard (but it might be connected underneath of the chip, that's hard to see, especially on photos).
For the stereo DAC's dead-end AGND wire, there's no visible connection on the mainboard (but it might be connected underneath of the chip, that's hard to see, especially on photos).
Last edited by nocash on Thu Oct 03, 2013 1:16 pm, edited 1 time in total.
Re: Legible SNES Schematics
My invention? Why would it be my invention if it's in jwdonal's schematic? (see picture below)nocash wrote:The dot on S-DSP.pin39 (/MUTE) seems to be your own invention - the scanned http://nocash.emubase.de/sns-scan.gif schematic doesn't have it
I noticed the same dead end on the "official" schematic, but I think it's there just to show that there's no connection to AVDD to that pin. It feels odd to copy such a thing though.For the stereo DAC's dead-end AGND wire, there's no visible connection on the mainboard (but it might be connected underneath of the chip, that's hard to see, especially on photos).
Another issue is J1 (the DC Jack in "A-6"), I think jwdonal might have accidentally used the wrong symbol. The symbol used is a two-conductor TS phone connector, instead of a barrel type. The polarity isn't obvious in this symbol.
Re: Legible SNES Schematics
Oops, sorry, not your invention (I didn't had my head on, sorry). The dot is a glitch, yes.
For the long dead end I am having the feeling that it is meant to extend to GND, else a normal short dead end would do it. Can't verify it on real mainboard at the moment.
Now that you are mentioning it, the headphone-like DC jack does actually look very wrong. A symbol that gives a hint on the shape of the connector might be most obvious, somehow like so:
For the long dead end I am having the feeling that it is meant to extend to GND, else a normal short dead end would do it. Can't verify it on real mainboard at the moment.
Now that you are mentioning it, the headphone-like DC jack does actually look very wrong. A symbol that gives a hint on the shape of the connector might be most obvious, somehow like so: