Mesen currently does not pass the IRQ tests found in Holy Diver Batman's test roms for the FME-7 (i.e: M69_P128K_C64K_S8K or M69_P128K_C64K_W8K)
I am following the information found on the wiki, but from what I can tell, this leads to the IRQ being triggered 2 cpu cycles too late for the test rom's code.
My code triggers the IRQ when the counter goes from $0 to $FFFF - so setting a value of 256 (like the test does), will trigger the IRQ flag 257 cycles later.
But the test contains the following comment:
"; Schedule an IRQ 256 cycles from now"
and then sets a value of 256 in the counter, which would cause the IRQ to be 257 cycles later.
This is how the IRQ test's code currently runs in Mesen:
Code: Select all
STA $A000 ;write cycle at cycle 0 IRQ Counter = $100
LDY #$E5 ;cycle 1 & 2 IRQ Counter = $FF
INY ;cycle 3 & 4
[...]
INY ;cycle 253 & 254
BEQ $559 ;Y = $FF, cycle 255, 256 IRQ Counter = $1 -> $0
CMP $FE ;cycle 257 & 258 IRQ Counter = $FFFF on before-last cycle, trigger IRQ next
[IRQ]
INC $FE ;cycle 266
[...]
RTI
BEQ $54E
INY ;Y = 0
BEQ $559 ;takes the branch and..
LDA #$10 ;test failed!
Code: Select all
STA $A000 ;write cycle at cycle 0
LDY #$E5 ;cycle 1
INY ;cycle 3
[...]
INY ;cycle 253, 254
BEQ $559 ;cycle 255, 256 IRQ Counter needs to get to $FFFF on the first cycle of BEQ to run on next instruction (i.e 255 cycles after enabling IRQs)
[IRQ]
INC $FE
[...]
RTI
CMP $FE ;pass
BEQ $559 ;doesn't branch, Y = $FF
CPY #FE
BCS $55D ;$FF > $FE, branches
[...] next irq test
However, puNES' behavior causes a minor graphical glitch in "Gimmick! (J)" (pixels at the bottom right flash from time to time)
FCEUX also passes this test, and has no graphical glitch, but also triggers the IRQ when the counter hits 0.
Nestopia/Nintendulator both fail it.
Since tepples wrote this, I guess this is mostly a question he could answer:
Has the Holy Diver Batman rom been run on an actual FME-7 cart? My assumption would be yes, but I figure I would ask to make sure.
In which case, is the information on the Wiki wrong? If the IRQ is triggered when the counter hits 0, that would still leave me with a 1 cycle gap to a working solution, though.
Or is there something wrong with my analysis?
Sorry for the wall of text!