Getting Mario RPG unto Kazzo (removing SA-1 chip hindrance)

Discuss hardware-related topics, such as development cartridges, CopyNES, PowerPak, EPROMs, or whatever.

Moderator: Moderators

lidnariq
Posts: 11432
Joined: Sun Apr 13, 2008 11:12 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by lidnariq »

calima wrote:but given how cheap I found the eeproms on aliexpress, and how many n64 gamers do not have the pak, eeprom should be cheaper
Those have got to be used part pulls. They were custom-built for the N64.
than flash or battery+sram or fram.
I'm not convinced it's practical to emulate the N64's flash saves. They're this cranky protocol that's different from how all other flash I've seen works—you have to fill the write-line-buffer before you tell it where to write it.

(The only NV storage devices in N64 carts were two different 512B serial EEPROMs, two different 2KiB serial EEPROM, 32 KiB parallel battery-backed RAM, four variants of 128 KiB parallel flash, and an RTC with 8 bytes of bonus storage. No FeRAM. )
tl;dr please consider making a cheap, homebrew-targeting n64 board, even if such a board would only run a fraction of commercial n64 roms.
More specifically, what are you looking for?

There already exist pre-tested schematics involving 3V word-wide flash, two 74'573s, two 74'193s, and a 74'00. I assume there's a way to reduce the cost of the latches and counters, but haven't really tried.
calima
Posts: 1745
Joined: Tue Oct 06, 2015 10:16 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by calima »

No FeRAM.
True, it wasn't used at the time, but I've seen many FRAM implementations where it replaces SRAM to remove the battery need: GB carts, N64 controller paks, and some other retro uses.
More specifically, what are you looking for?
Do you mean the cost? Retrostage's current board, able to run 99% of the commercial set, uses an expensive CPLD and is priced way too high for homebrew distribution. The other option, Retrocircuits, is priced at 15$; it contains every CIC, which is something that could be reduced.

Ideally, the board would be <10$. It would contain some form of save support, a kb or two would be plenty, whatever is cheapest. However, like our GB discussion, I really don't like rewriting the main flash chip for saves, that's a big risk.
lidnariq
Posts: 11432
Joined: Sun Apr 13, 2008 11:12 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by lidnariq »

calima wrote:Do you mean the cost? [...] contains every CIC, which is something that could be reduced.
Not significantly. The code's already been written; the only savings would come from removing the 6105/7105 support and switching from an already-pretty-cheap µC to a slightly-cheaper µC
Ideally, the board would be <10$.
The cost of the parallel NOR flash is a dramatic proportion of the cost. A lot of the question of cost will come down to just how much game you want to put in it. (And, if you're not having the boards manufactured yourself, just how little markup you can talk someone down to)
However, like our GB discussion, I really don't like rewriting the main flash chip for saves, that's a big risk.
The only real options for large flash are Spansion (now Cypress) and Micron; both the former's S29GL and the latter's MT28EW series flash support a per-sector write/erase lock with 64 KiB sectors. I don't know if that's enough to allay your concerns...

Certainly an all-new-parts design could use a second modern flash IC that would be incompatible with the existing flash protocol, but even the cheapest options that are compatible with the N64's parallel interface will be a significant proportion of the total materials cost.
calima
Posts: 1745
Joined: Tue Oct 06, 2015 10:16 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by calima »

The CICs are physically separate chips on there, not software on one chip. You don't mention modern, in-production EEPROMs, are they more expensive?

edit: 16kb eeproms seem to go for 20cents in qty 1, so I wonder about the translation chip costs then.
edit 2: By my reading, Microwire EEPROMs would not require any translation chips, some of them could be directly connected to the 1.6MHz clock and data pins. They come in lower sizes and are a bit more expensive, but the lack of other chips should compensate. AT93C86A seems the best, 2kb and .37 in qty 100.
lidnariq
Posts: 11432
Joined: Sun Apr 13, 2008 11:12 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by lidnariq »

I could have sworn Retrocircuits was using one of the modern microcontroller-based CIC clones—given how rare the everything but the 7101 and 6102 are, I can't imagine they'd actually provide all ten CICs for only $15.

Microwire is not compatible with the N64's Serial Interface, sadly. There are no modern in-production storage devices¹ that are directly compatible with the Serial Interface—only microcontroller-based emulations of same.

¹Someone's making all-new-parts N64 controllers, which is the same electronic protocol. There's also a publicly available PIC firmware to emulate a gamecube controller
calima
Posts: 1745
Joined: Tue Oct 06, 2015 10:16 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by calima »

They do use the microcontrollers, but they still place them all on the board, presumably to avoid having multiple SKUs (vs Retrostage having you pick one when you order).

If the S_DAT pin cannot be software-controlled, surely there is at least one pin that can?
tepples
Posts: 22708
Joined: Sun Sep 19, 2004 11:12 pm
Location: NE Indiana, USA (NTSC)
Contact:

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by tepples »

The Nintendo 64 controller protocol is binary pulse width keying, correct? That sounds a lot like the signaling used for Apple Desktop Bus and 1-Wire, with 1-Wire adding the feature of recovering power from the data line. Or are you referring to a higher-level protocol, such as to address multiple devices on a serial bus?

Could a CPLD handle the address counters and the translation between Joy Bus PWM and the SPI protocol used by modern serial flash memories?
lidnariq
Posts: 11432
Joined: Sun Apr 13, 2008 11:12 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by lidnariq »

calima wrote:They do use the microcontrollers, but they still place them all on the board, presumably to avoid having multiple SKUs (vs Retrostage having you pick one when you order).
I'm pretty certain the specific CIC is selected by solder jumper.
calima wrote:If the S_DAT pin cannot be software-controlled, surely there is at least one pin that can?
No, there's no GPIO. Every signal on the cart connector obeys some strict predefined protocol (CIC, SI, PI), or does nothing useful (power lines, audio mix, clock, composite sync).

Well, ok, you might be able to abuse the NMI/IRQ lines to serve as inputs, but I can't imagine that would work well.

You could do the standard "decode some memory region and map a parallel interface to some small inexpensive serial EEPROM for save storage" thing, but I don't know how painful the PI's DMA unit would make that. It'd be easier (and conceivably cheaper) to just map a second small parallel flash instead.


tepples wrote:The Nintendo 64 controller protocol is binary pulse width keying, correct? That sounds a lot like the signaling used for Apple Desktop Bus and 1-Wire.
Both ADB (~10kbit/sec) and 1wire (~17kbit/sec) are tremendously too slow. (The SI runs at 244kbit/sec)

Even "overdrive" 1wire (133kbit/sec) is too slow. And although the encoding is similar, the logical protocol isn't a match anyway.
calima
Posts: 1745
Joined: Tue Oct 06, 2015 10:16 am

Re: Getting Mario RPG unto Kazzo (removing SA-1 chip hindran

Post by calima »

You're right, small parallel flash chips are quite cheap. I see 4mb ones for ~1.50.
Post Reply