what purpose does this serve? is there a name for this piece of the circuit? how does the value of the cap affect things?put a 1nF capacitor on the leg of pin 20 (CE) (note: actually /CE) of the PRG ram chip and connect the other to ground
circuitry explanation for a cart hardware fix
Moderator: Moderators
-
- Posts: 260
- Joined: Mon Jan 23, 2012 11:27 pm
circuitry explanation for a cart hardware fix
from this topic where a glitch is discussed, and a hardware mod is given as a solution
Re: circuitry explanation for a cart hardware fix
It'll delay reads from and writes to RAM by a little bit. If there's a glitch because /ROMSEL arrives later than M2, and that glitch causes an erroneous write to RAM when the game tries to set the IRQ, then the capacitor might help with that.
Slower RAMs should also work.
Slower RAMs should also work.
Re: circuitry explanation for a cart hardware fix
I wonder why the NES decided to leave as many pins for "expansion" as they did, without feeding A15 or the 6000-7FFF decode signal to the cartridge port, since either of those would have eliminated the need for the timing cap.lidnariq wrote:It'll delay reads from and writes to RAM by a little bit. If there's a glitch because /ROMSEL arrives later than M2, and that glitch causes an erroneous write to RAM when the game tries to set the IRQ, then the capacitor might help with that.
Slower RAMs should also work.
Re: circuitry explanation for a cart hardware fix
They didn't really reevaluate what they were doing after the Famicom; they just stuck an extra 10 pins on to subsume the FDS cable, and another 4 for the CIC.
There's lots of little things that seem obvious in hindsight that would have either saved money or simplified certain things afterwards. Adding A15, adding inverted M2, adding inverted R/W, connecting some of the unused GPIO (OUT{1,2}; 401{6,7}d{1,2}) all would helped with cost reduction, without any silicon die changes at all.
There's lots of little things that seem obvious in hindsight that would have either saved money or simplified certain things afterwards. Adding A15, adding inverted M2, adding inverted R/W, connecting some of the unused GPIO (OUT{1,2}; 401{6,7}d{1,2}) all would helped with cost reduction, without any silicon die changes at all.
Re: circuitry explanation for a cart hardware fix
I'm not sure why inverted M2 or inverted R/W would be generated in the console. A15 is generated internally and used to derive other signals, including decodes for address ranges $0000-$1FFF and $2000-$3FFF, and the chip which generates those also generates signals for the $4000-$5FFF and $6000-$7FFF blocks. Although there are some places where adding chips in the console could have save cost in some cartridges, the signals mentioned already exist in the console.lidnariq wrote:They didn't really reevaluate what they were doing after the Famicom; they just stuck an extra 10 pins on to subsume the FDS cable, and another 4 for the CIC.
There's lots of little things that seem obvious in hindsight that would have either saved money or simplified certain things afterwards. Adding A15, adding inverted M2, adding inverted R/W, connecting some of the unused GPIO (OUT{1,2}; 401{6,7}d{1,2}) all would helped with cost reduction, without any silicon die changes at all.
BTW, I'm curious how the PPU memory layout evolved, since it seems needlessly complex from both a hardware and software standpoint. A 2Kx8 chip would have enough storage to store a screen worth of tiles, each with a separate attribute byte, and 16x8, 8x16, or ignore-attributes modes could have accommodated games that need double buffering. I wonder if the intention was to make the chip usable with a pair of 1Kx4 static RAMs?
Re: circuitry explanation for a cart hardware fix
A lot of 74 parts use an active-low enable.supercat wrote:I'm not sure why inverted M2
Obviates the need for bus conflict prevention.or inverted R/W
The NES already has a 74HCU04 to generate the clock for the CIC, and the other five are enlisted in CIC clock distribution (to prevent the cartridge for being able to short out the CIC clock), PPU /A13 generation, audio amplifier, and LED driver. I'm pretty certain that at least one inverter could be repurposed without compromising those functions.
Are you already familiar with the TMS9918? (MSX, SG1000). Beyond things like raster timing, its memory layout also influenced the NES PPU.... oh you're talking specifically about the attribute table.BTW, I'm curious how the PPU memory layout evolved, since it seems needlessly complex from both a hardware and software standpoint.
Non-square attribute zones would probably have been deemed too much of a pain to use - at least, that's what I heard when people more skilled with pixel art were told that we could give them finer attribute zones. No-attribute mode probably would have been nixed for being insufficiently colorful.16x8, 8x16, or ignore-attributes modes
I can guarantee that they never even considered double buffering as a use case. I'm comfortable saying that porting all of Nintendo's existing arcade games, as of 1983, was a design parameter for the PPU, and that includes smooth scrolling (e.g. Sky Skipper). But double buffering in 1983 was just too expensive for something where other options look good enough.could have accommodated games that need double buffering.
They clearly bent over backwards to fit into 1KiB, but I'm a little skeptical that they ever specifically aimed at having only 1KiB of RAM for the PPU.I wonder if the intention was to make the chip usable with a pair of 1Kx4 static RAMs?
- krzysiobal
- Posts: 1037
- Joined: Sun Jun 12, 2011 12:06 pm
- Location: Poland
- Contact:
Re: circuitry explanation for a cart hardware fix
Don't put a capacitor between /CE and GND. From my experience it is very problematic, for example - for -70ns SRAMs it worked, for -200ns it produced hanging of WRAM-based games randomly. Also it depended on the consoles, on some model it worked and on some doesn't.
Better use the diode-resistor-capacitor delay circuit on the RAM/CE pin.
Better use the diode-resistor-capacitor delay circuit on the RAM/CE pin.
-
- Posts: 260
- Joined: Mon Jan 23, 2012 11:27 pm
Re: circuitry explanation for a cart hardware fix
do you have some info on that circuit you can point me to?krzysiobal wrote:Don't put a capacitor between /CE and GND. From my experience it is very problematic, for example - for -70ns SRAMs it worked, for -200ns it produced hanging of WRAM-based games randomly. Also it depended on the consoles, on some model it worked and on some doesn't.
Better use the diode-resistor-capacitor delay circuit on the RAM/CE pin.
Re: circuitry explanation for a cart hardware fix
Code: Select all
/RAMCE --+--|>|--+-- RAM /CE
| |
+---R---+
|
C
|
gnd
Exact time constant for RC should be on the order of 30-50ns, maybe C=22pF and R=2.2k