Bank Switching

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Celius
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Bank Switching

Post by Celius »

Hi, I am currently putting together a technical demo, and my demo requires that I switch banks. Like, alot. And I'm currently putting this demo together with NESASM, because my other assembler is a little more difficult to set up, and I'm not too familiar with some of the options. But I'm having trouble bankswitching with NESASM. Also, I'm not sure which bank to put what in while having multiple banks. Like if I set the inesprg bank number to 4, which bank does the vector go in? I've tried alot of things, and the screen just goes grey, and there's no graphics loaded, no pallete, no code was going on. I'm using CHR-RAM, incase that helps. Will someone help me? thanks.
tepples
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Post by tepples »

On mappers with at least one hardwired PRG bank (i.e. just about everything but A*ROM, G*ROM, and Color Dreams), this hardwired bank is 1. the last bank in the ROM and 2. mapped into the areas where the 6502 CPU expects vectors. So put your vectors in the last bank.

You're using CHR RAM, but are you using CHR RAM on UNROM, SNROM, or AOROM? It makes a difference.
Celius
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Post by Celius »

I'm using MMC1. One other thing I'm confused about is like SNROM and UNROM and stuff, I don't know where you guys figured that out, and what any of it means. Yeah, that's bad, I should've probably looked a while ago. So if I have 4 prg banks, I'd use bank 7 for vectors, and I tried using bank 6 to org at $C000, and that worked, but I'm not sure why. This is in NESASM terms, remember. I'm lost.
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Memblers
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Post by Memblers »

I've never heard of anyone making a PRG larger than 32kB with NESASM (seems like someone must have by now). So if noone can help you much, it's because you're doing something noones done before, heheh.

Myself, I never understand the purpose of NESASMs bank numbers even for small roms..

BTW, SNROM etc. are the names Nintendo gave their cart PCB types. See how many different types there are for MMC1? heheh
http://tripoint.org/kevtris/mappers/mmc1/
But from a coding point of view, they're mostly the same except the memory types, so don't worry about it too much.
Celius
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Post by Celius »

So maybe I should just try making my demo on Wla-Dx, which is my other assembler? And when switching banks, you can just select a new bank, and org it at $8000 or $C000? And you just have one hard-wired bank of PRG, which is like bank 1, or whatever tepples said up there? So I could just go like this:

.bank 0
.org $8000

.....

.bank 1
.org $C000

....

.bank 2
.org $8000

....

.bank 3
.org $C000

.....

.bank 3
.org $FFFA

If that were my bank limit? Keep in mind, I'm using CHR-RAM. In the future, my project will be done with SUROM. But this is just a tech demo. I was wondering though, Why does it say 8k CHR RAM for SUROM on the MMC1 thing you showed me? Couldn't there be more CHR RAM? It's embedded in PRG, so what's the deal? Yeah, me and Bregalad are working on something really big, so it will need SUROM. He's doing the sound, I'm coming along on the engine for the game. But will that thing above work? I'm still a little lost. If I could be just a little more cleared up, I'll be good. Thanks a bunch! :)
tepples
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Post by tepples »

NROM/CNROM: bank 0 at $8000, bank 1 at $A000, bank 2 at $C000, bank 3 at $E000

CHR RAM is always 8 KB, as this is the size of the pattern tables, unless you have one of those really crazy boards such as CPROM or Squeedo that has more.
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Post by Celius »

Sorry, if anyone was dissapointed that I brought up this subject, but I am currently having problems with bankswitching. In Wla-Dx, I was able to first of all, make a 64k PRG 8k CHR Hello World demo, but I was also able to put my vectors in bank 1, and put my reset code in bank 0. But I'm still confused. Here is my set up:

bank 0 - reset $8000
bank 1 - code $C000
bank 2 - ? PRG space
bank 3 - ? PRG space
bank 4 - CHR data

How do I switch from bank 0 to bank 2/3? Can I just like randomly put "bank 2 org $8000" in the middle of my reset routine? or what?

EDIT: Is anyone alive anymore?
tepples
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Post by tepples »

To see how to operate bankswitching, look at the docs for each mapper. Usually it will consist of writes to ROM space.

If your assembler assumes 8 KB banks, and your mapper uses 16 KB banks, then you'll only be able to swap those banks in and out as a pair.
Celius
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Post by Celius »

It would be cool if someone explained to me what these characters in these registers stand for/mean, that'd be really cool.

Code: Select all

 Addr 	 7654.3210 	 Function
$8000-$9FFF 	xxxC.FHMM 	Controls PRG/CHR switching sizes and mirroring
$A000-$BFFF 	xxxC.CCCC 	Selects the lower CHR bank
$C000-$DFFF 	xxxC.CCCC 	Selects the upper CHR bank
$E000-$FFFF 	xxxR.PPPP 	Selects a PRG bank and enables RAM
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baisoku
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Post by baisoku »

Celius wrote:It would be cool if someone explained to me what these characters in these registers stand for/mean, that'd be really cool.

Code: Select all

 Addr 	 7654.3210 	 Function
$8000-$9FFF 	xxxC.FHMM 	Controls PRG/CHR switching sizes and mirroring
$A000-$BFFF 	xxxC.CCCC 	Selects the lower CHR bank
$C000-$DFFF 	xxxC.CCCC 	Selects the upper CHR bank
$E000-$FFFF 	xxxR.PPPP 	Selects a PRG bank and enables RAM
The page that you copied this table from has a description directly following the table. Spoiler: the capital letters represent bits or ranges of bits in the values written to the address ranges.
...patience...
Celius
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Post by Celius »

Okay, in both kevtris's and NESdevWiki's MMC1 docs, they talk about loading data into MMC1's registers. Okay, I get that, but what data are you writing to the registers? They don't say what to write to them. They just give you something like this:

LDA #$nn
STA $8000
LSR A
STA $8000
LSR A
STA $8000
LSR A
STA $8000
LSR A
STA $8000

What should #$nn be? And am I understanding correctly that you WRITE to the registers to LOAD them? And, this is kind of a dumb question, but why do you need to write to these registers?
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Post by Memblers »

Because it loads the registers serially (one bit at a time), as opposed to all bits in parallel. #$nn is the byte you're writing, look it up on that table you posted to see what to write.
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Post by tepples »

You are writing a 5-bit number, one bit at a time. The number is interpreted depending on which address you write to last.

If you are writing to the CHR $0000 bank register, then write a CHR bank number that you want to switch into PPU $0000-$0FFF. If you are writing to the PRG bank register, write a PRG bank number that you want to switch into CPU $8000-$BFFF (usually).

As for "load" and "store": It's a store from the CPU's point of view but a load from the mapper's point of view.
Celius
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Post by Celius »

Okay, I think I understand this mostly. I'm just confused about which address to write to. Like I don't know when to write to $8000 or $9FFF. So could you write say this to register 3:

lda #$03
sta $E000
lsr a
sta $E000
lsr a
sta $E000
lsr a
sta $E000
lsr a
sta $E000

To switch bank 3's data into $8000-$BFFF without any modifications to register 0? And could you just change swappable banks to 32k via register 0 to swap 2 16k banks at a time? Like swap banks 0 and 1 with 2 and 3? Not like swap 0 and 1 with 6 and 2, though, right? Am I understanding this correctly?
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kyuusaku
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Post by kyuusaku »

Yes.

Try configuring "reg0" with $0F. That gives you 16k swappable at $8000 like UOROM and 8k CHR swappable like CNROM, simple yet elegant.
Last edited by kyuusaku on Mon Feb 20, 2006 10:12 pm, edited 1 time in total.
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